Input vector monitoring concurrent BIST with Low hardware overhead
نویسنده
چکیده
Built-In Self-Test (BIST) techniques constitute an attractive and practical solution to the problem of testing VLSI circuits and systems. Input vector monitoring concurrent BIST schemes perform testing concurrently with the operation of the circuit. In this paper a novel input vector monitoring concurrent BIST scheme is presented that compares favorably to previously proposed schemes with respect to the required hardware overhead.
منابع مشابه
Design and Test of Concurrent Bist Architecture
Input vector monitoring concurrent BIST schemes are the class of online BIST techniques that overcomes the problems appearing separately in online and in offline BIST in a very effective way. This paper briefly presents an input vector monitoring concurrent BIST scheme, which monitors a set of vectors called window of vectors reaching the circuit inputs during normal operation, and the use of a...
متن کاملIJSRD - International Journal for Scientific Research & Development| Vol. 4, Issue 03, 2016 | ISSN (online): 2321-0613
Input vector monitoring concurrent built-in selftest schemes perform testing during the normal operation of the circuit without imposing a need to set the circuit offline to perform the test. These schemes are evaluated based on the hardware overhead and the concurrent test latency i.e., the time required for the test to complete, whereas the circuit operates normally. In this brief, we present...
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